ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
Public Member Functions | Public Attributes | List of all members
PortAllocation Class Reference

Port allocation for a single memory instance. More...

Public Member Functions

def __init__ (self, dict[MemoryOperand, dict[DataDirection, str]] data)
 
dict[DataDirection, str] get_alloc_for_mem_op (self, MemoryOperand mem_op)
 

Public Attributes

 data
 

Detailed Description

Port allocation for a single memory instance.

Stores which ports are available for which memory operands and their corresponding direction.

Constructor & Destructor Documentation

◆ __init__()

def __init__ (   self,
dict[MemoryOperand, dict[DataDirection, str]]  data 
)

Member Function Documentation

◆ get_alloc_for_mem_op()

dict[DataDirection, str] get_alloc_for_mem_op (   self,
MemoryOperand  mem_op 
)

Member Data Documentation

◆ data

data
The documentation for this class was generated from the following file: