ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
DataDirection Class Reference
Inheritance diagram for DataDirection:
Collaboration diagram for DataDirection:

Static Public Attributes

string RD_OUT_TO_LOW = "rd_out_to_low"
 
string WR_IN_BY_LOW = "wr_in_by_low"
 
string RD_OUT_TO_HIGH = "rd_out_to_high"
 
string WR_IN_BY_HIGH = "wr_in_by_high"
 
 TypeAlias
 

Member Data Documentation

◆ RD_OUT_TO_HIGH

string RD_OUT_TO_HIGH = "rd_out_to_high"
static

◆ RD_OUT_TO_LOW

string RD_OUT_TO_LOW = "rd_out_to_low"
static

◆ TypeAlias

TypeAlias
static

◆ WR_IN_BY_HIGH

string WR_IN_BY_HIGH = "wr_in_by_high"
static

◆ WR_IN_BY_LOW

string WR_IN_BY_LOW = "wr_in_by_low"
static

The documentation for this class was generated from the following file: