ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
Classes
architecture.memory_level Namespace Reference

Classes

class  ServedMemDimensions
 Represents a collection of Operational Array Dimensions (served by some Memory Instance) More...
 
class  MemoryLevel
 Represents a single memory in the memory hierarchy, consisting of a memory instance and connectivity information. More...