ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
Classes
architecture.imc_array Namespace Reference

Classes

class  ImcArray
 definition of an Analog/Digital In-SRAM-Computing (A/DIMC) core constraint: – activation precision must be in the power of 2. More...