ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
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Classes | |
class | RemoveExtraInfoStage |
Strips extra info for subcallables to save memory. More... | |
class | CacheBeforeYieldStage |
Caches results in a list and then yields them. More... | |
class | SkipIfDumpExistsStage |
Check if the output file is already generated, skip the run if so. More... | |
class | MultiProcessingSpawnStage |
Multiprocessing support stage. More... | |
class | MultiProcessingGatherStage |
Multiprocessing support stage. More... | |
Namespaces | |
zigzag.stages.run_opt_stages | |
Functions | |
def | get_threadpool (int|None nb_threads_if_non_existent) |
def | close_threadpool () |
def | terminate_threadpool () |
def | raise_exception (Exception e) |
Variables | |
logger = logging.getLogger(__name__) | |
threadpool = None | |