ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
Classes | Variables
reduce_stages Namespace Reference

Classes

class  MinimalEnergyStage
 Class that keeps yields only the cost model evaluation that has minimal energy of all cost model evaluations generated by it's substages created by list_of_callables. More...
 
class  MinimalLatencyStage
 Class that keeps yields only the cost model evaluation that has minimal latency of all cost model evaluations generated by it's substages created by list_of_callables. More...
 
class  MinimalEDPStage
 Class that keeps yields only the cost model evaluation that has minimal EDP of all cost model evaluations generated by it's substages created by list_of_callables. More...
 
class  SumStage
 Class that keeps yields only the sum of all cost model evaluations generated by its substages created by list_of_callables. More...
 

Variables

 logger = logging.getLogger(__name__)
 

Variable Documentation

◆ logger

logger = logging.getLogger(__name__)