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ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
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Classes | |
| class | FourWayDataMoving |
| Represents a standard four-way data moving attribute of a memory interface. More... | |
| class | MemoryAccesses |
| Represents the number of memory accesses in four directions. More... | |
| class | AccessEnergy |
| Represents the memory access energy in four directions. More... | |
| class | DataMoveAttr |
| class | DataMovePattern |
| Collects the memory access pattern for each unit memory (memory holding one operand at one level). More... | |
Namespaces | |
| zigzag.mapping.data_movement | |
Variables | |
| T = TypeVar("T", bound=int | float) | |