ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
DefaultNodeParser Member List

This is the complete list of members for DefaultNodeParser, including all inherited members.

__init__(self, int node_id, NodeProto node, dict[int, Any] nodes_outputs, ModelProto onnx_model, *list[dict[str, Any]]|None mapping_data=None, Accelerator|None accelerator=None)ONNXOperatorParser
acceleratorONNXOperatorParser
CUSTOM_ACT_SIZE_ATTRONNXOperatorParserstatic
CUSTOM_OUTPUT_SIZE_ATTRONNXOperatorParserstatic
CUSTOM_WEIGHT_SIZE_ATTRONNXOperatorParserstatic
generate_dummy_node(self)DefaultNodeParser
get_activation_precision(self)ONNXOperatorParser
get_input_output_weight_data_type(self)ONNXOperatorParser
get_intermediate_output_precision(self)ONNXOperatorParser
get_node_predecessors(self)ONNXOperatorParser
get_operand_source_user_format(self, list[int] predecessors)ONNXOperatorParser
get_weight_name(self, NodeProto node)ONNXOperatorParser
get_weight_precision(self)ONNXOperatorParser
mapping_dataONNXOperatorParser
nodeONNXOperatorParser
node_idONNXOperatorParser
nodes_outputsONNXOperatorParser
onnx_modelONNXOperatorParser
run(self)DefaultNodeParser