ZigZag - Deep Learning Hardware Design Space Exploration
This repository presents the novel version of our tried-and-tested hardware Architecture-Mapping Design Space Exploration (DSE) Framework for Deep Learning (DL) accelerators. ZigZag bridges the gap between algorithmic DL decisions and their acceleration cost on specialized accelerators through a fast and accurate hardware cost estimation.
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This is the complete list of members for SimpleSaveStage, including all inherited members.
__init__(self, list[StageCallable] list_of_callables, *str dump_folder, **Any kwargs) | SimpleSaveStage | |
zigzag::stages::stage::Stage.__init__(self, list["StageCallable"] list_of_callables, **Any kwargs) | Stage | |
__iter__(self) | Stage | |
dump_folder | SimpleSaveStage | |
is_leaf(self) | Stage | |
kwargs | Stage | |
list_of_callables | Stage | |
run(self) | SimpleSaveStage | |
save_to_json(self, CostModelEvaluationABC obj, str filename) | SimpleSaveStage |